|
Characterization of
-GaAs wafers (epi annealed
ion-implants on semi-insulating and
some doped* substrates)
-Silicon wafers (bulk Si, epi, annealed
ion-implants and POCl3 doping
uniformity on high resistivity
substrates)
-Thin film metallizations
*
Contact factory for details Performance
(Conforms to ASTM F673)
-Based on the average of a repeat
10-point wafer center test plan. Data
derived using NIST and/or VLSI
traceable uniformly-doped silicon
standards manually positioned on
handeler rails. Coil gap of >/=.035" Measurement Capabilities
-Nominal doped substrate thickness
range of 450 to 800 microns
-Normal coil gap (>/=.035"/.889mm)
preset at factory
-Adjustable gap to accomodate thicker
substrates
-Robotic handling of 2-6" or 3-8" wafers |
ÜBased on keyboard entry of known thickness
*Sheet Resistance values not equal to Bulk
Resistivity values
Thin-film thickness
-Thickness = (Bulk Resistivity) /
(Sheet Resistance) |
|
Wafer Thickness
-Capable of calculating resistivity with
keyboard-entered thickness Sample Handling and Sensing
-Up to 300 measurement points
-Automatic drift compensation
-Software-selectable resistivity ranges Operating Characteristics
-High spatial resolution
-Precise voltage regulation for tight
linearity and consistently repeatable
results Now Available
-GEM/SECS upgrade
-Bar code scanning capabilities
-Robotic wafer scanning |
Calibration
-Fully-automated
-Performed via easy-entry computer
screen
-Software-controlled (no manual
adjustments)
-16 bitsystem for data acquisition Computerization
-System is network, Windows NT
compatible
-Setup information may be saved under
operator-designated file names
-Ability to create custom test point plans
-Measurements and associated test
plans can be graphically displayed
-Computer, monitor and printer included
-10/100 Base-T Ethernet connection |
