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Introduction It is especially important to detect undesirable sheet resistance variations in incoming epitaxial or ion implanted and annealed wafers early, before adding the expensive process steps required to produce FET, PHEMT and HBT integrated circuits. Since Lehighton became involved with the Electrical Properties Task Force of the SEMI GaAs Committee - now the SEMI Compound Semiconductor Committee - at its inception, its first responsibility was to gather feedback on the electrical properties of GaAs wafers from world users and producers. Having received excellent cooperation from these survey participants, we have been working with and reporting on non-destructive instrumentation methods that show promise in achieving a good correlation between material electrical property measurements and device performance parameters. Many of the following applications have helped customers to save hundreds of thousands of dollars. Most of the reports here are from papers presented by our users, while others come from those considering the purchase of instruments to improve their repeatability and capability. Some of the methods can be applied to silicon and conductive substrates with proper consideration. The contactless wafer sheet resistance probes are based on a paper [1] and patent by Miller et al. of Bell Labs. These employ a special marginal oscillator with the wafer placed between the upper and lower halves of the coil. The electronics and mechanics of the probes have evolved greatly in the six generations since our original Model 1000 was sold to Hewlett-Packard Santa Rosa in 1977.From the start of development in 1976, we have used NBS (now NIST) silicon reference material wafers (SRMs) for calibration purposes. These have been |
extremely helpful in establishing the absolute values needed to maximize instrument performances and settle disputes. At times NIST SRMs have not been available, and have been substituted with wafers from commercial sources. These substitutions may result in yield problems and disagreements regarding absolute value differences. Any inputs that can aid in the definition of procedures and methods that should be used to assure adequate control and auditing will be appreciated. The new 100 mm NIST SRMs will start to be available in the last quarter of 1996. The University of Illinois is helping with the correlation between measurements made on the Model 1310 probe using different mapping plans to determine the ability to resolve microinch defects in wafers. This will aid in determining and minimizing the eddy current measurement area, to enable an ASTM test method for eddy current sheet resistance mapping. The university will also provide a calibration standard of approximately 20,000 ohms per square to be used as an in-house standard. The non-destructive sheet resistance measurement requires no fabrication steps, unlike the alternative procedures of point probe Isat measurements, the results of which have been compared closely with those of the present technique. Dr R.H. Wallis of GEC-Marconi Materials Technology Ltd states [2] that "At GMMT active device areas were defined by implant isolation and then pairs of ohmic contacts (which eventually form the source and drain contacts of the transistor) were deposited. The saturated current (Isat) between each pair of contacts was probed over the wafer using an in-house automated test system. The correlation is very good, both maps showing a similar "bulls-eye" pattern slightly offset from the centre of the wafer. The uniformity (expressed as the standard deviation over the mean) of the two sets of measurements was also in good agreement."Daniel H. Rosenblatt, of National Semiconductor, formerly of Samsung Microwave Semiconductor, in this excerpt from his MANTECH paper [3], compares the eddy current probe with a commercially available GaAs four point probe for accuracy and precision. |
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